About
Hyungjoo Park
| Seoul, Korea | pikkoro97@hanyang.ac.kr |
EDUCATION
MS, Electronic Engineering
Hanyang University, Seoul, Korea
March 2024 - Present
- Adviser: Jaeduk Han
- Research Interest: AMS Design Automation
BA, Electronic Engineering
Hanyang University, Seoul, Korea
March 2018 - Feb 2024 GPA: 3.85/4.5
- Full-tuition Scholarship (2018-2019)
ACADEMIC HONORS AND AWARDS
Code-a-Chip Travel Grant Awards at the 2023 ISSCC
January 2023
Issued by IEEE SSCS
- Scan Register Layout Generation using Laygo2
Code-a-Chip Travel Grant Awards at the 2023 Symposium on VLSI
April 2023
Issued by IEEE SSCS
- Process-Portable Full-Custom Memory Compiler using Laygo2 with Yosys Integration
2023 X-CORPS+ Festival
November 2023 Issued by the National Research Foundation of Korea
- Design Cost Reduction and Performance Enhancement using Circuit Design Automation
RESEARCH INTERESTS
- Analog-Mixed Signal (AMS) Circuit
- AMS Design Automation
- Open-source IC Design
ACADEMIC EMPLOYMENT
Collaboration
Purdue University (Prof. Haitong Li) Sept 2023 – Jan 2024
- Developing RRAM compiler working in open-source environments
UT Austin (Prof: David Z Pan) Sept 2023 – Present
- Enhancing transistor placement algorithm by utilizing Meta-Heuristic algorithms.
Undergraduate Research Assistant
Hanyang University Oct 2021 – Feb 2024
- Developing cache memory compiler using open-source frameworks.
- Developing open-source AMS circuit generation framework named ‘LAYGO2’.
MAJOR PROJECTS & RESEARCH
Open-source IC design Toolchain
Hanyang University Jan 2022 – Aug 2022
- Building Python interface module that connects Laygo2 and open-source EDA named Magic-VLSI.
- Designing primitive cells such as unit MOSFET for open-source PDK
- The result toolchain was released on github and presented at Silicon Austria Labs (SAL)
Open-source Cache Memory Compiler
Hanyang University Feb 2023 – Apr 2023
- Developing Laygo2-based full-customizable cache memory compiler.
- Implementing Verilog integration to generate initial Laygo2 code from Verilog scripts.
- The compiler was presented at 2023 Symposium on VLSI and Technology and Circuits.
PUBLICATIONS
T. Shin, D. Lee, D. Kim, G. Sung, W. Shin, Y. Jo, H. Park, and J. Han. (Dec. 2023) “LAYGO2: A Custom Layout Generation Engine Based on Dynamic Templates and Grids for Advanced CMOS Technologies,” The IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 42, No. 10, pp.4402-4412
POSTER PRESENTATIONS
“SCAN Register Layout Generation Using Laygo2.” 2023 International Solid-State Circuits Conference, San Francisco, California, Febrary 2023.
“Process-Portable Full-Custom Memory Compiler using Laygo2 with Yosys Integration.” 2023 Symposium on VLSI Technology and Circuits, Kyoto, Japan, June 2023.
“Design Cost Reduction and Performance Enhancement using Circuit Design Automation.” 2023 X-CORPS+ Festival, Seoul, Korea, November 2023.
ONLINE ARTICLES
Open Source Analog IC Design Project
Read the Docs
- Tutorial for the open-source IC design toolchain to generate simple D-Flop Flop
- https://laygo2-sky130-docs.readthedocs.io/en/main/
MAJOR SKILLS
Hardware: Analog-Mixed Signal (AMS) Design, Cadence Virtuoso, Ngspice, MAGIC-VLSI, Verilog-A
Software: C/C++, Python, TCL, Algorithm
Signal Processing: Matlab, DSP (Basic Fourier Analysis)
OTHER PROJECTS
Plastic Injection Molding Machine Control System 4th place (Korean Startup)
- We developed a remote control system for bare-metal molding machines using Raspberry Pi.
- Successfully recycled plastic by producing panels using the developed molding machine.